This invention relates to an integrated circuit employing floating gate memory devices of the FAMOS type (floating gate avalanche injection MOS) and more particularly to an integrated-circuit electrically-programmable-read-only-memory (EPROM) having an array of N-channel IGFET memory devices employing a floating gate and IGFET N-channel peripheral devices that control and sense the memory devices, and even more particularly relates to such floating gate devices having double diffused sources and drains.
An EPROM that employs floating-gate IGFET devices is described in the application filed concurrently herewith, entitled Method for Making a Self-Aligned CMOS EPROM Wherein the EPROM Floating Gate and CMOS Gates Are Made From One Polysilicon Layer.
In addition to having a control gate similar to the control gate of the peripheral devices, FAMOS and more particularly EPROM devices have a floating gate positioned below the control gate. It is this floating gate which allows the EPROM device to store charge, thereby programming the EPROM device. Conversely, when the EPROM device is unprogrammed, the floating gate is uncharged.
The architecture required places constraints on the size of the EPROM device. Since the floating gate must rest directly below the control gate, both gates must be large enough to allow their proper alignment. Self-alignment of both the control gate and the floating gate allows a reduction in the size of the EPROM device.
Most conventional commercial EPROM integrated circuits are NMOS wherein both the EPROM device and all the peripheral devices are N-channel. CMOS EPROMs have been disclosed wherein in addition to N-channel EPROM devices the peripheral transistors are both N-channel and P-channel. This invention pertains to the double doping of drains and sources of N-channel memory devices as well as N-channel peripheral devices.
A laboratory CMOS EPROM has been disclosed that includes EPROM devices each having a double diffused drain to enhance the programming efficiency thereof. However, it was specifically taught in that disclosure that the second doping was P-type while the first doping was N-type, and neither the EPROM device source, or the sources and drains of peripheral devices without floating gates were double diffused.
It is an object of the present invention to provide an integrated circuit IGFET EPROM device or the like having a double diffused source and drain.
It is a further object of this invention to provide such an integrated circuit wherein the EPROM device and peripheral control devices are N-channel IGFET devices all having double diffused sources and drains.
It is yet a further object of this invention to provide a method for making such an EPROM device wherein the addition of the second of the double doping of sources and drains does not require the addition of another masking step.